The present invention relates to a method for manufacturing a semiconductor device and, more particularly, to a method for manufacturing a bipolar semiconductor device.
Significant developments have been made recently in micropatterning techniques for semiconductor devices. Techniques of ion-implantation, selective oxidation and the like have contributed to such developments. In the manufacture of bipolar semiconductor devices, selective oxidation, in particular the recessed oxide method (buried oxidation method), is indispensable in attaining higher integration and higher speed. Thus, selective oxidation is generally used in the manufacture of, for example, such bipolar integrated circuits as an I.sup.2 L (Integrated Injection Logic) and an ECL (Emitter Coupled Logic). Element characteristics of a device can be improved if selective oxidation is utilized together with a technique to be described below. According to this technique, a field oxide film and an element region surrounded thereby are formed in an n-type semiconductor layer as a collector region. After forming a p-type base region in the element region, an arsenic-doped polycrystalline silicon film pattern (a polycrystalline silicon film doped with an n-type impurity having a small diffusion coefficient) is formed on part of the p-type base region and on the field oxide film. Using the arsenic-doped polycrystalline silicon film pattern as a diffusion source, a shallow n.sup.+ -type emitter region is formed to be contiguous with the field oxide film. At the same time, the polycrystalline silicon film pattern is used for forming electrodes.
Although selective oxidation techniques as described above have various advantages, they are also subject to certain problems. When selective oxidation is performed, dislocations or OSFs (Oxidation-induced Stacking Faults) occur in a portion of a silicon substrate which is immediately below an edge of the field oxide film. When an emitter region is to be formed to be contiguous with the field oxide film, anomalous diffusion of the impurity is caused in the substrate portion immediately below the edge of the field oxide film. The pile-up phenomenon of phosphorus and the like may also be caused upon selective oxidation. As a result of this, the C (collector-- E (emitter) withstand voltage is lowered, and the manufacturing yield of the devices is also lowered. These problems become more pronounced with an increase in packing density.
When the relationships among the thickness of a silicon nitride film as a selective oxidation mask, the thickness of the underlying thin buffer oxide film, and dislocations are considered, dislocations can be reduced with a decrease in the thickness of the silicon nitride film and with an increase in the thickness of the buffer oxide film. However, when the thickness of the silicon nitride film is decreased and that of the buffer oxide film is increased, lateral oxidation progresses to produce a large pattern transfer error, thus disabling micropatterning. Accordingly, if selective oxidation is adopted in the manufacture of semiconductor devices, optimal thicknesses of a silicon nitride film and a buffer oxide film must be determined with regard to dislocations and pattern transfer error, so that micro-patterning will not result in a low yield.
However, even when selective oxidation is performed under optimally selected conditions as described above in combination with alternate technique to be described below in order to manufacture a high-speed, high-performance bipolar semiconductor device, an unexpectedly low yield is experienced. The above-mentioned alternate technique involves forming a shallow n-type impurity region (emitter region) with two side surfaces contiguous with a field oxide film using an arsenic-doped poly-crystalline silicon film pattern as a diffusion source. Such a low yield is considered to be attributable not only to the selected oxidation conditions but also to C--E leakage or C--E short-circuiting due to anomalous diffusion of the impurity along crystal defects such as dislocations formed due to impurity concentrations in the polycrystalline silicon film pattern.